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Staff Chemical Mechanical Planarization (CMP) Engineer

Intel · Phoenix, AZtoday
$134k – $255kfrom the posting

MS-level Process Engineering roles on Crosslinked list a median of $155k (60 that show pay).

Lead CMP process development and HVM transfer across Intel's advanced logic nodes, resolving yield issues with suppliers and cross-functional teams.

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Worth knowing

Why it is interesting. Module ownership of CMP on Intel's most advanced GAA logic technologies, working directly with equipment and consumables suppliers.

Might not be for you. Requires prior semiconductor foundry and direct CMP experience, so not suited to early-career or outside-industry candidates.

Technical leadFast-paced Senior hires only Realistic requirements

Adjacent materials roleCMP process development; experience with CMP consumables (slurries, pads, conditioning disks, clean chemistries); materials science degree

H-1B filings

Intel filed 974 H-1B labor applications for scientist and engineer roles from Jan to Dec 2025.

Most common titles: Process Engineer, Engineering Manager, Quality Reliability Engineer. Median filed pay: $124K a year.

From U.S. Department of Labor disclosure data. A filing is a record of past hiring, not a promise about this role, so confirm sponsorship with the employer. Titles and filed pay ·Every employer's filings

Seniority
Staff/Principal
Work
Hybrid
Type
Full-time
Degree
MS
Experience
5+ yrs
Industry
Semiconductor
Role
Process Engineering
Materials
CMP slurries6 rolesCMP pads2 rolesconditioning disksclean chemistries
Techniques
CMP process characterizationthickness metrology1 roletopography metrologydefect and particle metrology
Benefits
stock bonuses

Role details

Job Details

Job Description:

Shape the Future of Semiconductor Innovation at Intel Foundry

Organization Overview

Manufacturing Development Customer Engineering (MDCE) is a newly established organization within Intel Foundry Technology Manufacturing and is focused on accelerating technology ramp and manufacturing excellence. Our mission is to seamlessly transition cutting-edge technologies from development to high-volume production while making technology ramp a key competitive differentiator for Intel Foundry.

Position Summary

MDCE is seeking a Staff Chemical Mechanical Planarization (CMP) Engineer to drive module ownership and technical leadership across Intel's most advanced logic technologies (18A, Intel 3, Intel 12nm). This role requires a seasoned professional who can navigate the complexities of process development, cross-node standardization, and high-volume manufacturing readiness while delivering exceptional results for both Intel products and foundry customers.

Core Responsibilities

Technical Leadership

  • Process Development & Optimization: Lead CMP process development from concept through HVM implementation across multiple advanced technology nodes
  • Cross-Node Alignment: Drive standardization and best practices across Intel's technology portfolio to maximize efficiency and yield
  • Problem Resolution: Own and resolve complex CMP-related yield and manufacturing issues using data-driven approaches and structured problem-solving methodologies

Strategic Execution

  • Customer-Centric Delivery: Align technical strategies with customer requirements and business objectives, ensuring on-time delivery of robust solutions
  • Technology Transfer: Bridge technology development and manufacturing teams to ensure smooth transition of CMP processes to production
  • Continuous Improvement: Drive ongoing optimization initiatives to enhance process capability, yield, and manufacturing efficiency

Collaboration & Leadership

  • Cross-Functional Partnership: Work closely with Integration, Device, Yield, Factory, Quality, and Customer Engineering teams
  • Supplier Engagement: Collaborate with equipment and consumables suppliers to co-develop and optimize CMP solutions
  • Team Development: Mentor junior engineers and provide technical guidance across the organization

Professional Excellence

  • Proven Track Record: History of significant technical accomplishments and successful project delivery
  • Leadership Capability: Ability to influence and drive results across multiple organizations and disciplines
  • Business Acumen: Understanding of semiconductor industry trends, manufacturing strategies, and customer requirements

Personal Attributes

  • Communication Skills: Exceptional ability to communicate complex technical concepts to diverse audiences
  • Adaptability: Thrives in ambiguous situations and can drive clarity in complex technical challenges while work effectively in fast-paced, high-pressure environments
  • Initiative: Self-motivated with strong persistence and ability to work independently
  • Quality Focus: Meticulous attention to detail with commitment to safety, quality, and compliance standards

Qualifications

The Minimum qualifications are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

  • Master's degree in Chemical Engineering, Materials Science, Electrical Engineering, Mechanical Engineering, Physics, or related technical field
  • 5+ years of experience in semiconductor manufacturing / process development or technology development
  • 3+ years of direct experience in Chemical Mechanical Planarization (CMP) process development experience with hands-on process tuning and characterization
  • Experience with major CMP equipment platforms in one of the following platforms (AMAT, Ebara, etc.)
  • Experience with CMP consumables (e.g. slurries, pads, conditioning disks, filters, clean chemistries)
  • Previous semiconductor foundry experience

Preferred Qualifications

  • Doctorate in Chemical Engineering, Materials Science, Electrical Engineering, Mechanical Engineering, Physics, or related technical field
  • Experience with advanced technology nodes (e.g. sub-10nm logic, specifically in Gate All Around (GAA) architectures with track record of successful technology development and HVM implementation
  • Cross-functional leadership experience, including task force leadership for yield improvement initiatives
  • Experience with CMP integration with other process modules (e.g. deposition, lithography, etch, clean) and CMP-relevant metrology with understanding of CMP impact on device performance and yield.
  • Experience with CMP-relevant metrology and process control (e.g. thickness, topography, defects, roughness, particles)

Work Environment

This role requires in-person collaboration to enable rapid decision-making and effective problem resolution. You'll work in a dynamic, fast-paced environment with competing priorities while maintaining the highest standards for safety, quality, and customer satisfaction.

Impact & Growth

Join a team that's reshaping Intel's foundry capabilities and directly influencing the success of next-generation semiconductor technologies. This role offers exceptional opportunities for professional growth, technical leadership, and meaningful impact on Intel's strategic objectives in the foundry market.

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $133,800.00 - 255,200.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Related roles

Common questions

What is the salary for the Staff Chemical Mechanical Planarization (CMP) Engineer role at Intel?

The listed annual base salary range is $134K–$255K. This figure is taken from the posting itself.

Does Intel sponsor H-1B visas?

Intel has filed H-1B petitions with the US Department of Labor in past years, but this specific posting does not explicitly mention sponsorship for the Staff Chemical Mechanical Planarization (CMP) Engineer role. Confirm with the employer before applying if visa support is required.

Where is the Staff Chemical Mechanical Planarization (CMP) Engineer role at Intel based?

This role is based in Phoenix, AZ. Work arrangement: Hybrid.

What degree is required for the Staff Chemical Mechanical Planarization (CMP) Engineer role at Intel?

This role requires a MS.

How many years of experience does this Staff Chemical Mechanical Planarization (CMP) Engineer role require?

The posting calls for at least 5 years of relevant experience.

What polymers or materials does this Staff Chemical Mechanical Planarization (CMP) Engineer role work with?

CMP slurries, CMP pads, conditioning disks, clean chemistries.

What techniques or methods are required for this Staff Chemical Mechanical Planarization (CMP) Engineer role?

CMP process characterization.